Ultra scaled VLSI technology made the road-map for single chips with millions of transistors. The breadboard verification of these highly dense and complicated circuits became almost impossible. Hence Computer-aided techniques became critical for verification and design of VLSI digital circuits. "" is a popular Hardware Description Language extensively used in Semiconductor Industries for designing digital IPs. It allows the designer to describe a digital system through text rather than schematic. Verilog is a sort of must for all those Electrical and Computer Engineers who are involved in Digital System Design.
The general topics come under Verilog are:
(1) Data Types and Basic Concepts of Verilog
(2) Modules and Ports
(3) Gate level Modeling
(4) Dataflow Modeling
(5) Behavioral Modeling
(6) Tasks and Functions
(7) Verilog Testcases
(8) Timing and Delays
(9) User-Defined Primitives
(10) Logic Synthesis with Verilog HDL
(1) Verilog HDL (A Guide to Digital Design and Synthesis)
This is a fantastic book for the new learners. The book is intended for beginners and intermediate-level Verilog users. This book emphasizes breadth rather than depth. The book presents a logical progression of Verilog HDL-based topics. The book is useful for students in logic design courses at universities, new Verilog users in the industry and users with basic Verilog knowledge who need to understand advanced concepts.
Publisher : Prentice Hall
Unlike the Verilog HDL by Palnitkar; this book does not come up with Verilog basics from the scratch step by step. This book provides a library of general purpose routines that simplify the task of Verilog programming and enhance existing designs. This library covers many of the common functions that a hardware designer is likely to need. Each chapter addresses a common type of function such as state machines, memory models, or data flow. Each section of a chapter gives an example of code to implement that particular function. Verilog Designer's Library is the book that offers real, reusable routines that you can put to work right away. This is the book which helps to learn Verilog directly from the designed modules.
Publisher : Star Galaxy Pub
This is the book which emphasizes Logic Synthesis using Verilog HDL. This book followed an example driven approach to explain the Verilog HDL synthesis. This book reveals a variety of situations where differences between simulation and synthesis semantics are bound to occur. These are carefully covered so that novice and experienced designers become aware of these hard to debug but, very common pitfalls.
